SPARCcenter 2000
INTRODUCTION
November 10, 1992
The 3 phases listed are to provide historical data.
AVAILABILITY
The 2000 is capable of sensing
environmental problems.
There is a temperature sensor
located beneath each SPARC Module.
If the temperature exceeds 55 degrees C
a warning goes to the console to fix
the problem OR the 2000 will shutdown
if no action is taken, the system brings
itself down and powers itself off.
Likewise there is a fan rotation sensor.
If the fan speed drops below 70% of the
max output a similar series of events will
occur.
There is also a voltage sensor.
Please see the memory section for more
on availability of memory.
When the system powers up it runs POST.
POST is Power On Self Test. If a
bad subsystem or CPU is found, the
2000 will deconfigure that bad module
out of the configuration and bring
itself up as long as there are enough
remaining components to allow that to happen.
SPECrate_int92 for the 85MHz CPU's
6,546 SPECrate_int92 for 2 CPU's
35,332 SPECrate_int92 for 12 CPU's
57,997 SPECrate_int92 for 20 CPU's
Based on Apogee compilers and Kuck & Associated Preprocessor
SPECrate_base_int92 for the 85MHz CPU's
5,875 SPECrate_base_int92 for 2 CPU's
33,067 SPECrate_base_int92 for 12 CPU's
53,714 SPECrate_base_int92 for 20 CPU's
Based on Apogee compilers and Kuck & Associated Preprocessor
SPECrate_fp92
6,284 SPECrate_fp92 for 2 CPU's
35,948 SPECrate_fp92 for 12 CPU's
54,206 SPECrate_fp92 for 20 CPU's
Based on Apogee compilers and Kuck & Associated Preprocessor
SPECrate_base_fp92
5,742 SPECrate_base_fp92 for 2 CPU's
32,531 SPECrate_base_fp92 for 12 CPU's
51,489 SPECrate_base_fp92 for 20 CPU's
Based on Apogee compilers and Kuck & Associated Preprocessor
Estimated TPS
NA for 2 CPU's
NA for 12 CPU's
27,440 for 20 CPU's
AIM3 Max Throughput
2,037 for 2 CPU's
9,637 for 12 CPU's
12,104 for 20 CPU's
Maximum User - AIM3
2,028 for 2 CPU's
8,004 for 12 CPU's
9,436 for 20 CPU's
Estimated NFS Ops
1,750 for 2 CPU's
5,950 for 12 CPU's
6,700 for 20 CPU's
HISTORICAL Performance Numbers
SPECrate_int92
2,326 jobs/ref time for 2 40MHz CPU's
4,539 jobs/ref time for 4 40MHz CPU's
6,524 jobs/ref time for 6 40MHz CPU's
8,047 jobs/ref time for 8 40MHz CPU's
SPECfp92
76.6 SPECratio for 2 40MHz CPU's
93.8 SPECratio for 4 40MHz CPU's
103.3 SPECratio for 6 40MHz CPU's
109.0 SPECratio for 8 40MHz CPU's
SPECrate_fp92
2,953 jobs/ref time for 2 40MHz CPU's
5,627 jobs/ref time for 2 40MHz CPU's
8,498 jobs/ref time for 2 40MHz CPU's
10,600 jobs/ref time for 2 40MHz CPU's
SPECrate 50MHz:
--------
SC2000-16way, SPECrate_int92=21196 SPECrate_fp92=28064
SC2000-12way, SPECrate_int92=16272 SPECrate_fp92=21464
SC2000-8way, SPECrate_int92=11177 SPECrate_fp92=14689
SC2K-2MB
USE THE BELOW NUMBERS WITH CAUTION
SPARCcenter 2000 PERFORMANCE DATA
(8-12-16 way, 50 MHz/2 MB E$) August 4, 1993
SMCC Performance Engr, 9 pages
newstop:/sun/tech-mktg/perf-data/SC2K-LADDIS-SPEC92.ps.Z
Highlights:
----------
SPEC SFS:
--------
SC2000-8way, 2422 SPECnfs_A93 Ops/sec @ 35.4 Msec
NFS
2575 NFS ops/sec @ 48.9 ms using
8 CPU's, 512MB, 12 Ethernets, 24 2.1 GB drives
and Solaris 2.3 Beta
2080 NFS ops/sec @ 32.6 ms using
8 CPU's, 512MB, 8 Ethernets, 49 2.1 GB drives
and Solaris 2.3 Pre-FCS
MFLOPS
46.7 LINPACK1000 DP parallelized - 2 50MHz CPU's
91.2 LINPACK1000 DP parallelized - 4 50MHz CPU's
130.0 LINPACK1000 DP parallelized - 6 50MHz CPU's
159.6 LINPACK1000 DP parallelized - 8 50MHz CPU's
249.5 LINPACK1000 DP parallelized - 12 50MHz CPU's
268.5 LINPACK1000 DP parallelized - 20 50MHz CPU's
AIM III
570 jobs/min time for 2 50MHz CPU's
1,014 jobs/min time for 4 50MHz CPU's
1,339 jobs/min time for 6 50MHz CPU's
1,631 jobs/min time for 8 50MHz CPU's
AIMS
408.4 for 20 50MHz CPU's
MAX THROUGHPUT
4,002 jobs/min 50MHz CPU's
BELOW IS FOR THE 2000E System with 50MHz backplane & 60MHz processors
Note: performance estimates reflect Solaris 2.4 operating system
TPS 1,300 for 10 60MHz CPUs
tpmC 2,152.6 for 10 60MHz CPUs
NFS 4,385
SPECrate_int92 4,282 for 2 60MHz CPUs
SPECrate_fpt92 4,282 for 2 60MHz CPUs
SPECrate_int92 38,213 for 20 60MHz CPUs
SPECrate_fpt92 44,722 for 2 60MHz CPUs
AIMS III (job/minute) 1,113 for 2 60MHz CPUs
AIMS III (job/minute) 5,682 for 20 60MHz CPUs
END HISTORICAL Performance Numbers
XBUS
CPU's are 1 per SPARC module
There is a max of 2 SPARC modules per system board
XBUS Is the protocol spoken
sits between the BW and the CC
XDBUS
Speed is 640 per (800 on the E system) second peak
and 500MB (625MB on the E system) sustained
This is a packet switch type of bus
meaning it does not hold the bus during a request
like a circuit switched ( MBUS )
There are 2 XDBUS's per 2000
It is a 64 bit 40MHz (50MHz on the E system)
asynchronous bus
meaning that the processors can run at
different clock rates
PROCESSOR
Texas Instruments Super SPARC
Super SPARC or Viking is a super scalar
implementation of SPARC that follow Version 8
what this means is that it can execute more then
1 instruction per clock cycle
Viking has 20KB of instruction cache on-board
Viking has 16KB of data cache on-board
Viking has an external cache of 1MB
MAX is 20 CPU's
MMU
Viking supports V8 of the SPARC
Reference MMU spec
This allows for QUAD Precision 128 bits also
CACHE
(1 processor) 1MB external cache
20KB of instruction and 16KB of data cache on-board
SBUS
20MHz on the 2000 and 25MHz on the E system
32 bit SBus
there are 4 SBUS slots available per system board
Each system boards has a SBus Interface
Each SBus slot has a read-ahead & write behind
buffer for I/O
sustained thruput is ~ 50MBs per second
The reason for SBUS on the 2000 series is to
take advantage of the large # of SBus Cards
MEMORY
max memory is 5.12GB (32MB SIMMS - 10 boards 512MB )
max memory is 128MB per system board using 8MB SIMMS
max memory is 512MB per system board using 32 SIMMS
Up to 16MB of NVRAM for NFS write improvement
The 2000 does hot sparring of memory, which means
it can remap out bad blocks
The 2000 does memory scrubbing, which means
it sends all of memory periodically through
the ECC unit which can fix single bit errors
before they become double bit errors
80 or 100 ns access time
it uses both from two manufacturers.
Each bank of memory is an array of DRAMs
controlled by an ASIC called the MQH.
Memory Queue Handler.
The MQH interfaces directly to the XDBus.
The MQH supports ONLY transfers of full
blocks of 64 bytes.
The MQH implements address decoding, ECC
error correction, XDBuss access and memory
control in a single chip.
Phase-1 12x 64MB ECC memory (set of 8 8MB SIMMS)
Phase-2 20x 64MB ECC memory (set of 8 8MB SIMMS)
Phase-3 20x 64MB ECC memory (set of 8 8MB SIMMS)
Phase-1 10x 256MB ECC memory (set of 8 32 MB SIMMS)
Phase-2 20x 256MB ECC memory (set of 8 32 MB SIMMS)
Phase-3 20x 256MB ECC memory (set of 8 32 MB SIMMS)
sum total of 64MB SIMM sets, 256MB SIMM sets and
8MB NVRAM sets must be less than or equal to 2 sets
per system
max of 16MB of NVRAM on a 2000
ONLY the 8MB NVRAM SIMMS are supported
Please see the supported options list for more detail
on possible memory set combinations
MONITOR
optional; 17" grayscale ; 19" color Max all phases is 1
PACKAGE
56" 10 slot cabinet
BUS
XDBUS - no VME - use SBus to VME adapters
from 3rd parties for VME access
SBUS
Phase-1 max SBE/S is 5
Phase-2 max SBE/S is 5
Phase-3 max SBE/S is 5
Phase-1 max FSBE/S is 5
Phase-2 max FSBE/S is 5
Phase-3 max FSBE/S is 5
Phase-1 max DSBE/S is 19
Phase-2 max DSBE/S is 17
Phase-3 max DSBE/S is 39
DWI/S max is 20 DWI/S cards and 39 disk trays
Phase-1 max 2nd ethernet is 8
Phase-2 max 2nd ethernet is 8
Phase-3 max ACTIVE ethernets is 20
Phase-1 max FDDI(Bantam) is 4
Phase-2 max FDDI(Bantam) is 4
Phase-3 max FDDI(Bantam) is 10
Phase-1 max HSI/S is 4
Phase-2 max HSI/S is 4
Phase-3 max HSI/S is 4
Phase-1 max SPC is 4
Phase-2 max SPC is 4
Phase-3 max SPC is 10
Phase-1 max SBus printer card is 1
Phase-2 max SBus printer card is 4
Phase-3 max SBus printer card is 8
Phase-3 max SBus SPC card is 8
Phase-1 max tokenring card is 4
Phase-2 max tokenring card is 4
Phase-3 max tokenring card is 4
Phase-1 max ISDN card is 1
Phase-2 max ISDN card is 1
Phase-3 max ISDN card is 1
TM max of 10 cards
FastEthernet cards max of 20
PERIPHERALS
1/4" tape, 1/2" tape, IPI disks, 1 CD-ROM
PORTS
2 RS232/423 ports, keyboard and 8 led's on cpu board
BACKUP OPTIONS
140-GB 8mm tape library
20GB 4mm auto loader
14GB 8mm tape
5GB 8mm tape
2.5GB 1/4" tape
1/2" front load tape
Initial TAPE Options
tape is 150MB SCSI 1/4" tape
Front Load 6250/1600/800 HP tape drive
in one main cabinet. One FL tape
takes up the same space as 12 (2.1) DSCSI's
also can accommodate 5 GB 8mm
phase-1 max system 5.0GB 8mm is 3
phase-2 max system 5.0GB 8mm is 3
phase-3 max system 5.0GB 8mm is 3
phase-1 max expansion 5.0GB 8mm is 4
phase-2 max expansion 5.0GB 8mm is 4
phase-3 max expansion 5.0GB 8mm is 16
phase-1 max tape tray in expansion racks is 1
phase-2 max tape tray in expansion racks is 1
phase-3 max tape tray in expansion racks is 4
SCSI
CD-ROM comes standard; up to 3 8mm in system cabinet
all phases max is 1 CD-ROM
devices 1/2" tape in a single CPU enclosure
Maximum Disk Capacity
4.86TB Total
162GB max for internal DSCSI-2
1.9TB max for external DSCSI-2
1.26TB max for 20 SSA's Model 112
4.8TB max for 15 SSA's Model 210
IPI
There is a trade in policy for IPI drives
OR the customer could go to Genroco
for an IPI SBus controller
OPERATING SYSTEM
2.1 or higher
UPGRADES
from 390, 490, 690 only
PACKAGE
10 slot XDBUS system, 56" rack, 800 lbs.
disk expansion 56" rack, 1000 lbs max.
POWER
power supply is 200-240VAC, 1200 watt auto-ranging
uses a NEMA L6-30R receptacle
Redundant Power supply system is available
DBA
< 55 dba for CPU and < 65 dba for expansion rack
CODENAME
Dragon
Date this file was last modified
December 26, 1995